LP-DDR4X
Samsung Semiconductor proposed an LPDDR4 variant it called LPDDR4X. LPDDR4X is identical to LPDDR4 except additional power is saved by reducing the I/O voltage (Vddq) to 0.6 V from 1.1 V.
On 9 January 2017, SK Hynix announced 8 and 6 GiB LPDDR4X packages.JEDEC published the LPDDR4X standard on 8 March 2017.
Aside from the lower voltage, additional improvements include a single-channel die option for smaller applications, new MCP, PoP and IoT packages, and additional definition and timing improvements for the highest 4266 Mbit/s speed grade.
LP-DDR5
On 19 February 2019, JEDEC published the JESD209-5, Standard for Low Power Double Data Rate 5 (LPDDR5).
Samsung announced it had working prototype LP-DDR5 chips in July 2018. LPDDR5 introduces the following changes:
- Data transfer rate is increased to 6.4 Gbit/s/pin
- Differential clocks are used
- Prefetch is not doubled again but remains 16n
- The number of banks is increased to 16, divided into four DDR4-like bank groups
- Power-saving improvements:
- Data-Copy and Write-X (all one or all zero) commands to decrease data transfer
- Dynamic frequency and voltage scaling
- A new clocking architecture called WCK & Read Strobe (RDQS)
